LVCMOS

Low voltage CMOS (LVCMOS) is the most common single-ended output interface standard used by oscillators. Low voltage usually means less than 5V and includes 3.3V, 2.5V, 1.8V, and lower voltages. The output swing is ideally rail to rail (0V to VDD) but is typically not quite full rail at the receiver due to losses. The diagram below shows an example of a 3.3V LVCMOS signal.

LVDS

Low voltage differential (LVDS) signaling is a common oscillator differential output format. It is usually lower power than other differential outputs and has a voltage swing of about 350 mV. This output format is commonly used in network switches, routers, wireless base stations, and telecom tran***ission systems. Below is a typical LVDS output waveform. See related terms: HCSL, LVPECL

LVPECL

Low voltage positive emitter-coupled logic (LVPECL) is a common oscillator differential output format. It has a voltage swing of about 800 mV with the differential cross point at around 2V. LVPECL is used in applications where low noise is important such as network switches, routers, wireless base stations, and telecom tran***ission systems. The key features of LVPECL are the constant current source driver and the fact the transistors never go into saturation, which are key to low noise and fast switching speed respectively. The diagram below shows a typical differential LVPECL waveform. See related terms: HCSL, LVDS

MEMS

Micro-electro-mechanical systems (MEMS) is the technology of microscopic devices with moving parts. In some regions, this technology is known as micro-machines or micro-systems technology. MEMS evolved from process technologies used in the fabrication of semiconductor devices. Therefore, silicon is the most common material used for manufacturing MEMS components. MEMS technology is used a wide variety of commercial applications including accelerometers, gyroscopes, microphones, and a range of sensors. MEMS have been commercially used as an alternative to quartz crystal resonators and shipping in production volume since in 2007. For more information see SiTime's MEMS First™ and EpiSeal™ Processes Technology Paper.

MTBF

Mean time between failures (MTBF) is the predicted time between oscillator failures. Quartz-based devices usually have a MTBF in tens of millions of hours. SiTime oscillators have a MTBF of over 1 billion hours. Another measure of quality is failure in time (FIT) rate which is a number of failures in a unit of time such as millions of hours or billions of hours. For more information see SiTime Reliability Calculations Application Note.

Operating Temperature Range

Operating temperature range is the temperature span in which all oscillator parameters are specified within in the datasheet. Common temperature ranges are listed below. Commercial, Automotive Grade 4: 0°C to 70°C Extended Commercial: -20°C to 70°C Industrial, Automotive Grade 3: -40°C to 85°C Extended Industrial, Automotive Grade 2: -40°C to 105°C Automotive Grade 1: -40°C to 125°C Military: -55°C to 125°C Automotive Grade 0: -40°C to 150°C

Output Enable

Output enable (OE) is a feature that is used to control the oscillator output state via a digital input signal. The output enable function means that the device outputs the frequency when the control pin is pulled high and it is disabled when the pin is pulled low.

Packaging

Oscillators are usually available in industry-standard package dimensions. The pad arrangements and corresponding solder pad layout may vary among vendors, but the overall x-y dimensions are standardized. Standard package sizes for XOs, TCXOs, and VCXOs are as follows. 2016: 2.0 x 1.6 mm 2520: 2.5 x 2.0 mm 3225: 3.2 x 2.5 mm 5032: 5.0 x 3.2 mm 7050: 7.0 x 5.0 mm OCXOs are housed in significantly larger packages that range from 9.7 x 7.5 mm to 135 x 72 mm. A common OCXO package size is 25.4 x 25.4 mm.

Parts per Million (ppm) and Parts per Billion (ppb)

These are relative units of frequency with respect to the nominal frequency. 1 ppm means 1/106 part of a nominal frequency. 1 ppb means 1/109 part of a nominal frequency.

Period Jitter

Period jitter is the deviation in cycle time of a clock signal over a number of randomly selected cycles (JEDEC JESD65B). The suggested minimum sample size is 10,000 cycles. The process for obtaining and computing period jitter is as follows. 1. Measure the duration (rising edge to rising edge) of one clock cycle 2. Wait a random number of clock cycles 3. Repeat the above steps 10,000 times 4. Compute the mean, standard deviation (σ), and the peak-to-peak values from the 10,000 samples See related terms: Cycle to cycle (C2C) jitter, Integrated Phase Jitter (IPJ), Long-Term Jitter, Phase Noise

Phase Noise

In an oscillator, phase noise is the rapid, short-term, random fluctuation of the phase of a clock signal, caused by time-domain instabilities. Phase noise L[f] is expressed in decibels relative to carrier power (dBc) per 1-Hz bandwidth. It is related to the spectral density of phase fluctuations S(f) as L[f] = 10log[0.5S(f)] (US Federal Standard 1037°C, Glossary of Telecommunication Terms). In simpler terms, phase noise is a frequency domain measure of what manifests as clock jitter in the time domain. Following is a phase noise plot of a SiTime SiT9365 oscillator that highlights key information related to phase noise.

Pull Linearity

Pull linearity is one of the characteristics that determine the quality of a VCXO. The response of the VCXO frequency to control voltage change over the full pull range should ideally be a straight line. Pull linearity quantifies how far the real characteristic is away from the perfect line. It is defined as the ratio between frequency error from the expected value to the total deviation, expressed in percent, where frequency error is the maximum frequency excursion from the so-called “Best Straight Line” drawn through a plot of output frequency vs control voltage. The diagram below illustrates this concept.

Pull Range – Total Pull Range and Absolute Pull Range

Total pull range (PR) is the amount of frequency deviation that results from changing the control voltage over its maximum range under nominal conditions. Absolute pull range (APR) is the guaranteed controllable frequency pull range of a voltage controlled oscillator over all environmental and aging conditions. The diagram below shows the relationship between pull range and absolute pull range.

Pullability

Pullability is the ability to control or pull oscillator output frequency over a narrow range from the nominal frequency value. The typical means of frequency control is a control voltage applied to the control voltage input pin for VCXOs. DCXOs (digitally controlled crystal oscillators) allow pulling the frequency by writing digital control words over a serial interface such as I2 C or SPI. Pullability range varies in oscillators from ±5 ppm to ±3200 ppm.

Quality Factor, Q

Quality factor is proportional to the ratio of energy stored to energy dissipated per cycle of an oscillator as shown in the equation below. Q = 2 π Energy Stored per Cycle Energy Dissipated per Cycle Higher Q represents a better, more underdamped oscillator because less energy is lost per cycle. Q impacts close to carrier phase noise with higher Q resulting in lower (better) phase noise. The Q of an AT cut quartz resonator ranges from 10,000 to 100,000. SiTime MEMS resonators have a typical Q of 150,000.

Retrace

Retrace is the frequency error between multiple consecutive power cycles of the oscillator. It shows how well the oscillator returns to the same absolute frequency after the power has been removed for some time and applied back to the device. Retrace is of particular importance in precision oscillators such as OCXOs. The causes of retrace are not fully understood, but can involve strain changes in the resonator’s mounting structure and contamination redistribution inside the package. SiTime TCXOs have among the industry’s lowest (best) retrace, typically less than ±10 ppb, because of extremely low contamination levels on the order of parts-per-billion (ppb) due to wafer-level encapsulation of the resonator.

Rise/Fall Time

Rise/fall time is the duration of the rising and falling edge of the output signal typically measured between 20% and 80% or 10% and 90% of the output signal levels. The diagram below shows rise and fall time defined for 10% to 90% on a single-ended output.

Single-Ended

In contrast to differential output, single-ended output consists of a single output clock, usually LVCMOS, which swings approximately rail to rail (0V to VDD). Single-ended output is the most common oscillator output type.

SPL

Solder pad layout (SPL) is the layout of the printed circuit board landing pads upon which the oscillator sits. The example below shows an SPL for a 6-pin 7050 oscillator package (7.0 mm x 5.0 mm).

Standby

Standby is a low-power mode where most of the internal circuitry is completely shut down and the oscillator does not produce any output frequency. Initiated setting digital control input pin into appropriate state.

Start-up Time

Start-up time is the time period from when supply voltage (VDD) is applied (90%) to the oscillator and when the first output clock cycle begins. The diagram below illustrates start-up time.

Supply Current

Supply current is the maximum operating current of an oscillator. It is measured in microamps (µA) or milliamps (mA) at the maximum and sometimes nominal supply voltage. Typical supply current is measured without load.